fd-family switching regulators, pcb + chassis benign environment 4 - 84 edition 2/96 - ? melcher ag melcher
the power partners. 4.3 toko switching regulators fd-family no input to output isolation single output of 3.3, 5, 12, 15 or 30 v dc/0.5...1.5 w double output of 12 or 15 v dc/0.5...3 w input voltage from 4.5 v up to 17 v dc ? miniature size ? surface mounting type ? high power density ? high efficiency ? excellent line/load regulation ? parallel operation ? inhibit function available ? high reliability new table of contents page type survey .............................................................. 4 - 84 description ................................................................ 4 - 85 safety and installation instructions ........................... 4 - 85 electrical input and output data ............................... 4 - 86 immunity to environmental conditions ...................... 4 - 88 mechanical data ....................................................... 4 - 88 type key and product marking ................................. 4 - 89 table 1b: survey of flyback type fdb and fdf nominal nominal input nominal efficiency type rated output output voltage input designation output voltage current range voltage (typ) power u o nom i o u i u i nom h (master or slave) p o max 5 v 100...250 ma 5...12 v 8 v 77 % fdf 1103 1.25 w 12 v 45...115 ma 4.5...5.5 v 5 v 70 % fdb 1001 1.4 w 70...125 ma 9...17 v 12 v 71% fdf 1301 1.5 w 15 v 40...90 ma 4.5...5.5 v 5 v 70 % fdb 1002 1.35 w 70...100 ma 9...17 v 12 v 71 % fdf 1302 1.5 w 30 v 10...30 ma 5...12 v 8 v 79 % fdf 1105 0.9 w 6...17 v 12v 80 % fdf 1205 12 v 22.5... 57.5 ma 4.5...5.5 v 5 v 72 % fdb 2001 1.4 w 35... 62.5 ma 9...17 v 12 v 73 % fdf 2301 1.5 w 15 v 20... 45 ma 4.5...5.5 v 5 v 72 % fdb 2002 1.35 w 35... 50 ma 9...17 v 12 v 72 % fdf 2302 1.5 w type survey table 1a: survey of step-down type fdd nominal nominal input nominal efficiency type rated output output voltage input designation output voltage current range voltage (typ) power u o nom i o u i u i nom h (master or slave) p o max 3.3 v 120...600 ma 5...12 v 8 v 84% fdd 1106 2 w 6...17 v 12 v 82% fdd 1206 5 v 87% fdd 1203 3 w
benign environment switching regulators, pcb + chassis fd-family edition 2/96 - ? melcher ag 4 - 85 melcher
the power partners. 4.3 description the fd-family features very compact designed switching regulators in a miniature size case for surface mount, hence, these converters have an extremely high power density. with a high efficiency of up to 87 %, very stable out- put voltages as well as high reliability, the fd-family be- comes a perfect choice for the supply of lcd's, non-volatile memories, voltage distribution in 5 v logical circuits and ccd applications. furthermore, a special master-slave connection allows safe parallel operation of two or more units. for a wide variety of filtering circuits for smooth out- put voltages, a full range of optional choke coils are avail- able. remarks: smoothing capacitors should be connected within 15 mm from the converter pins. it is recommended to use low impedance smoothing ca- pacitors with high frequency rating. refer to the table above for recommended external capacitors. filtering recommendations circuit design by means of adding input and output capaci- tors in order to reduce ripple and noise to a moderate value. c 1 c 2 c 2 vi sd gnd vo gnd vo+ 1 6 pdr fig. 1 external circuitry for 2 output units fig. 2 external circuitry for 1 output step down units c 1 c 2 vi sd gnd n.c. gnd vo+ 1 6 pdr table 2b: recommended external capacitors table 2a: recommended external capacitors safety and installation instructions safety for step down types if the output circuit of a switching regulator is operator-ac- cessible according to the iec 950 related safety standards, it shall be an selv circuit (safety extra low voltage circuit, i.e. a circuit, separated from mains by at least basic insula- tion, that is so designed and protected that under normal and single fault conditions, the voltage between any two conductors and between any conductor and earth does not exceed dc 60 v). in the following statement an interpretation is provided of the iec 950 safety standard with respect to the safety sta- tus of the output circuit. however, it is the sole responsibility of the installer or user to assure the compliance with the relevant and applicable safety standards: if the input circuit of a switching regulator is an selv circuit, its output is considered to be an selv circuit. safety for step up types if the output circuit of a switching regulator is operator-ac- cessible according to the iec 950 related safety standards, it shall be an selv circuit (safety extra low voltage circuit, i.e. a circuit, separated from mains by at least basic insula- tion, that is so designed and protected that under normal and single fault conditions, the voltage between any two conductors and between any conductor and earth does not exceed dc 60 v). in the following statement an interpretation is provided of the iec 950 safety standard with respect to the safety sta- tus of the output circuit. however, it is the sole responsibility of the installer or user to assure the compliance with the relevant and applicable safety standards: if the input circuit of a switching regulator is an selv circuit and the output is protected against overvoltages higher than 60 v by external means, e.g. an overvoltage suppres- sor diode, the output is considered to be an selv circuit. c 1 i i ripple type i o ripple c 2 (ma rms ) (ma rms ) os-con 535 fdd 1106 100 sp cap 10 m f/20 v 490 fdd 1206 105 22 m f/8 v in parallel 575 fdd 1203 135 al-chip 450 fdb 1001 245 same as c 1 33 m f/25 v fdb 1002 215 425 fdb 2001 125 os con 415 fdb 2002 105 3.3 m f/20 v in parallel al-chip 33 m f/25 v c 1 i i ripple type i o ripple c 2 (ma rms ) (ma rms ) os-con 245 fdf 1301 205 same as c 1 3.3 m f/20 v 240 fdf 1302 180 in parallel 260 fdf 2301 135 al-chip 250 fdf 2302 130 33 m f/25 v 475 fdf 1103 395 sp cap os-con 22 m f/8 v 10 m f/20 v in parallel in parallel al-chip al-chip 33 m f/25 v 33 m f/25 v 295 fdf 1105 55 al-chip 270 fdf 1205 60 10 m f/50 v 2 in parallel
fd-family switching regulators, pcb + chassis benign environment 4 - 86 edition 2/96 - ? melcher ag melcher
the power partners. 4.3 electrical input and output data general condition; t a = 25 c table 3a: input and output data fdd single channel characteristics conditions fdd 1106 fdd 1206 fdd 1203 unit min typ max min typ max min typ max output u o output voltage u i min u i max 3.2 3.3 3.4 3.2 3.3 3.4 4.85 5.0 5.15 v i o nom output current u i min u i max 120 360 600 120 360 600 120 360 600 ma u o output ripple u i min , i o max 15 15 15 mv pp d u o u static line regulation u i min ... u i max 1.5 1.5 1.5 % d u o i static load regulation u i nom, i o min ... i o max 1 1 1 d u o / d t thermal coefficient u i nom , i o min ... i o max 0.5 0.5 0.5 input u i input voltage i o min ... i o max 5 8 12 6 12 17 6 12 17 v dc efficiency h efficiency u i nom , i o nom 84 82 87 % table 3b: input and output data fdb single channel characteristics conditions fdb 1001 fdb 1002 unit min typ max min typ max output u o output voltage u i min u i max 11.64 12 12.36 14.55 15 15.45 v i o nom output current u i min u i max 45 80 115 40 65 90 ma u o output ripple u i min , i o max 58 49 mv pp d u o u static line regulation u i min ... u i max 1.5 1.5 % d u o i static load regulation u i nom, i o min ... i o max 1 1 d u o / d t thermal coefficient u i nom , i o min ... i o max 0.5 0.5 input u i input voltage i o min ... i o max 4.5 5 5.5 4.5 5 5.5 v dc efficiency h efficiency u i nom , i o nom 77 79 % parallel connection vi sd gnd voC gnd gnd vo+ fdf 2301m
master fdf 2301s
slave fdf 2301s
slave 1 6 1 6 1 6 drive signal
for parallel
operation
pdr fig. 3 parallel connection notes: C for parallel operation the master parallel drive signal out- put is connected to the slave parallel drive signal input. C up to 5 units can be operated in parallel. C the converters should be placed close to each other. soldering directions best results can be achieved with a soldering temperature of 215 c for 10 seconds using a reflow soldering system after a pre-heating period of 80 seconds at 135 c. the switching regulator should not be exposed to the heat for more than 30 seconds. solder temperatures exceeding 240 c may damage the device.
benign environment switching regulators, pcb + chassis fd-family edition 2/96 - ? melcher ag 4 - 87 melcher
the power partners. 4.3 general condition: t a = 25 c table 3c: input and output data fdf single channel characteristics conditions fdf 1103 fdf 1105 fdf 1205 unit min typ max min typ max min typ max output u o output voltage u i min u i max 4.85 5 5.15 29.1 30 30.9 29.1 30 30.9 v i o nom output current u i min u i max 100 175 250 10 20 30 10 20 30 ma u o output ripple u i min , i o max 34 53 46 mv pp d u o u static line regulation u i min ... u i max 1.5 1.5 1.5 % d u o i static load regulation u i nom, i o min ... i o max 1 1 1 d u o / d t thermal coefficient u i nom , i o min ... i o max 0.5 0.5 0.5 input u i input voltage i o min ... i o max 5 8 12 5 8 12 6 12 17 v dc efficiency h efficiency u i nom , i o nom 77 79 80 % table 3e: input and output data fdb double channel characteristics conditions fdb 2001 fdb 2002 unit min typ max min typ max output u o output voltage u i min u i max +11.64 +12 +12.36 +14.55 +15 +15.45 v C12.72 C12 C11.28 C15.90 C15 C14.10 i o nom output current u i min u i max 22.5 40 57.5 20 32.5 45 ma u o output ripple u i min , i o max 59 49 mv pp d u o u static line regulation u i min ... u i max u o + 1.5 1.5 % u o C 3.0 3.0 d u o i static load regulation u i nom u o + 1 1 i o min ... i o max u o C 2 2 d u o / d t thermal coefficient u i nom , i o min ... i o max 0.5 0.5 input u i input voltage i o min ... i o max 4.5 5 5.5 4.5 5 5.5 v dc efficiency h efficiency u i nom , i o nom 72 72 % table 3d: input and output data fdf single channel characteristics conditions fdf 1301 fdf 1302 unit min typ max min typ max output u o output voltage u i min u i max 11.64 12 12.36 14.55 15 15.45 v i o nom output current u i min u i max 70 100 125 70 85 100 ma u o output ripple u i min , i o max 76 72 mv pp d u o u static line regulation u i min ... u i max 1.5 1.5 % d u o i static load regulation u i nom, i o min ... i o max 1 1 d u o / d t thermal coefficient u i nom , i o min ... i o max 0.5 0.5 input u i input voltage i o min ... i o max 9 12 17 9 12 17 v dc efficiency h efficiency u i nom , i o nom 71 71 %
fd-family switching regulators, pcb + chassis benign environment 4 - 88 edition 2/96 - ? melcher ag melcher
the power partners. 4.3 general condition: t a = 25 c table 3f: input and output data fdf double channel characteristics conditions fdf 2301 fdf 2302 unit min typ max min typ max output u o output voltage u i min u i max +11.64 +12 +12.36 +14.55 +15 +15.45 v C12.72 C12 C11.28 C15.90 C15 C14.10 i o nom output current u i min u i max 35 50 62.5 35 42.5 50 ma u o output ripple u i min , i o max 48 42 mv pp d u o u static line regulation u i min ... u i max u o + 1.5 1.5 % u o C 3.0 3.0 d u o i static load regulation u i nom u o + 1 1 i o min ... i o max u o C 2 2 d u o / d t thermal coefficient u i nom , i o min ... i o max 0.5 0.5 input u i input voltage i o min ... i o max 9 12 17 9 12 17 v dc efficiency h efficiency u i nom , i o nom 73 73 % table 5: pin assignments type of regulator pin no. 1 pin no. 2 pin no. 3 pin no. 4 pin no. 5 pin no. 6 master 1 output step down vi+ sd pdr vo+ gnd n.c. 2 outputs vi+ sd pdr vo+ gnd voC slave 1 output step down vi+ n.c. pdr vo+ gnd n.c. 2 outputs vi+ n.c. pdr vo+ gnd voC n.c. = not connected, sd = control signal on/off (low = on, vi+ or floating = off), pdr = parallel drive signal mechanical data dimensions in mm. 14.7 max. 2 14 14 5 5 6.75 1.6 1 2 3 6 5 4 fig. 4 mechanical dimensions european
projection immunity to environmental conditions table 4: temperature specifications temperature operating storage characteristics conditions min max min max unit t a ambient temperature u i min ... u i max C10 65 C40 85 c i o min ... i o max r.h. relative humidity 95 95 %
benign environment switching regulators, pcb + chassis fd-family edition 2/96 - ? melcher ag 4 - 89 melcher
the power partners. 4.3 type key and product marking type key fdd 1 1 0 6 m family ...................................................... fdd, fdb, fdf channel ........................................................................ 1, 2 nominal input voltage 5 v ............................................ 0 9 v ............................................ 1 6...17 v ..................................... 2 9...15 v ..................................... 3 nominal output voltage 12 v .......................................... 1 15 v .......................................... 2 5 v ............................................ 3 3.3 v ......................................... 6 master/slave type master ..................................... m slave ........................................ s product marking main face: part number, output voltage and lot number.
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